Fabricating an SRAM cell

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Reexamination Certificate

active

07012293

ABSTRACT:
The present invention provides an improved SRAM cell design. The SRAM cell includes a first active area on oxide in a first conductive well located on a first vertical side of the SRAM cell, a second active area on oxide in a second conductive well located on the first vertical side of the SRAM cell, a third active area on oxide in the first conductive well located on a second vertical side of the SRAM cell, a fourth active area on oxide in the second conductive well located on the second vertical side of the SRAM cell, a first gate located on the first vertical side of the SRAM cell, a second gate located on the second vertical side of the SRAM cell, a first local interconnect connecting the first active area, the second active area, and the second gate via a second EC contact located on the second gate, and a second local interconnect connecting the third active area, the fourth active area, and the first gate via a first EC contact located on the first gate.

REFERENCES:
patent: 5742078 (1998-04-01), Lee et al.
patent: 6169313 (2001-01-01), Tsutsumi et al.
patent: 2002/0135021 (2002-09-01), Karasawa et al.

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