Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-01-11
2011-01-11
Choe, Yong (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S144000, C712S236000
Reexamination Certificate
active
07870339
ABSTRACT:
A facility and cache machine instruction of a computer architecture for specifying a target cache cache-level and a target cache attribute of interest for obtaining a cache attribute of one or more target caches. The requested cache attribute of the target cache(s) is saved in a register.
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Greiner Dan F.
Slegel Timothy J.
Campbell John E.
Choe Yong
International Business Machines - Corporation
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