Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2008-05-06
2010-06-22
Verbrugge, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S154000
Reexamination Certificate
active
07743220
ABSTRACT:
A computing machine and system to provide multiple independent simultaneous memory requests is disclosed. The computing machine includes a memory. A plurality of heterogeneous computational nodes embodied in an integrated circuit are configured to make requests for memory accesses to the memory. A memory controller allows multiple independent simultaneous requests for memory accesses by the heterogeneous computational nodes to the memory.
REFERENCES:
patent: 4380046 (1983-04-01), Frosch et al.
patent: 4649512 (1987-03-01), Nukiyama
patent: 4758985 (1988-07-01), Carter
patent: 4870302 (1989-09-01), Freeman
patent: 4905231 (1990-02-01), Leung et al.
patent: 5099418 (1992-03-01), Pian et al.
patent: 5144166 (1992-09-01), Camarota et al.
patent: 5165023 (1992-11-01), Gifford
patent: 5218240 (1993-06-01), Camarota et al.
patent: 5245227 (1993-09-01), Furtek et al.
patent: 5336950 (1994-08-01), Popli et al.
patent: 5388062 (1995-02-01), Knutson
patent: 5428754 (1995-06-01), Baldwin
patent: 5475856 (1995-12-01), Kogge
patent: 5701398 (1997-12-01), Glier et al.
patent: 5729754 (1998-03-01), Estes
patent: 5737631 (1998-04-01), Trimberger
patent: 5771362 (1998-06-01), Bartkowiak et al.
patent: 5784699 (1998-07-01), McMahon et al.
patent: 5802278 (1998-09-01), Isfeld et al.
patent: 5838894 (1998-11-01), Horst
patent: 5892962 (1999-04-01), Cloutier
patent: 6018783 (2000-01-01), Chiang
patent: 6119178 (2000-09-01), Martin et al.
patent: 6128307 (2000-10-01), Brown
patent: 6134605 (2000-10-01), Hudson et al.
patent: 6134629 (2000-10-01), L'Ecuyer
patent: 6154492 (2000-11-01), Araki et al.
patent: 6173389 (2001-01-01), Pechanek et al.
patent: 6202189 (2001-03-01), Hinedi et al.
patent: 6272616 (2001-08-01), Fernando et al.
patent: 6282627 (2001-08-01), Wong et al.
patent: 6326806 (2001-12-01), Fallside et al.
patent: 6347346 (2002-02-01), Taylor
patent: 6381293 (2002-04-01), Lee et al.
patent: 6426649 (2002-07-01), Fu et al.
patent: 6438737 (2002-08-01), Morelli et al.
patent: 6467009 (2002-10-01), Winegarden et al.
patent: 6469540 (2002-10-01), Nakaya
patent: 6483343 (2002-11-01), Faith et al.
patent: 6604189 (2003-08-01), Zemlyak et al.
patent: 6611908 (2003-08-01), Lentz et al.
patent: 6618777 (2003-09-01), Greenfield
patent: 6647429 (2003-11-01), Semal
patent: 6675284 (2004-01-01), Warren
patent: 6684319 (2004-01-01), Mohamed et al.
patent: 6694380 (2004-02-01), Wolrich et al.
patent: 6751723 (2004-06-01), Kundu et al.
patent: 6760833 (2004-07-01), Dowling
patent: 6807590 (2004-10-01), Carlson et al.
patent: 6859434 (2005-02-01), Segal et al.
patent: 6883074 (2005-04-01), Lee et al.
patent: 6907598 (2005-06-01), Fraser
patent: 6941336 (2005-09-01), Mar
patent: 6980515 (2005-12-01), Schunk et al.
patent: 6986142 (2006-01-01), Ehlig et al.
patent: 7174432 (2007-02-01), Howard et al.
patent: 7577799 (2009-08-01), Howard et al.
patent: 2002/0133688 (2002-09-01), Lee et al.
patent: 2002/0184275 (2002-12-01), Dutta et al.
patent: 2003/0074473 (2003-04-01), Pham et al.
patent: 2003/0131162 (2003-07-01), Secatch et al.
patent: 2003/0229864 (2003-12-01), Watkins
patent: 2004/0015970 (2004-01-01), Scheuermann
patent: 2004/0133745 (2004-07-01), Ramchandran
patent: 2005/0044327 (2005-02-01), Howard et al.
patent: 2005/0044344 (2005-02-01), Stevens
patent: 2005/0166073 (2005-07-01), Lee
patent: 2007/0157166 (2007-07-01), Stevens
patent: WO 00/69073 (2000-11-01), None
Altera Apex 20K 1999.
Andraka Consulting Group, “Distributed Arithmetic,” Obtained from: http://www.fpga-guru.com/distribu.htm (1998-2000).
Computer Organization and Design 2ndEdition, Hennessy, Morgan Kaufmann Publishers, p. 570 (1998).
Free On-Line Dictionary of Computing. © 1995-2000 www.foldoc.org search terms: cache, operating system, Internet, DMA, interrupt.
Hanna et al., “A Normalized Backpropagation Learning Algorithm for Multilayer Feed-Forward Neural Adaptive Filters,”Neural Networks for Signal Processing XI, Proceedings of the 2001 IEEE Signal Processing Society Workshop pp. 63-72 (Sep. 2001).
Janweijer et al., “A Compact Robin Using the SHarc (CRUSH),” Obtained from: http:/ /www.nikhef.n1/˜peterj/Crush/CRUSH-hw.pdf (Sep. 1998).
Rajagopalan et al., “A Flexible Multiplication Unit for an FPGA Logic Block,”Circuits and Systems4:546-9 (2001).
Xilinx The Programmable Logic Data Book, Apr. 1998.
Xilinx Virtex-E 1.8 V Extended Memory FPGAs, v. 1.1, pp. 1-110, Aug. 1, 2000.
Virtex-E 1.8 V Extended Memory FPGAs, v. 2.2, pp. 1-52, Sep. 10, 2002.
U.S. Appl. No. 10/719,921 Office Action Date Mailed Jun. 14, 2006.
U.S. Appl. No. 11/803,998 Office Action Date Mailed Jul. 25, 2007.
U.S. Appl. No. 12,115,843 Office Action Date Mailed Sep. 9, 2009.
Furtek Frederick Curtis
Master Paul L.
Kaufman Marc S.
Nixon & Peabody LLP
QST Holdings LLC
Verbrugge Kevin
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