Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-02-14
2006-02-14
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S716000
Reexamination Certificate
active
07000149
ABSTRACT:
A method and apparatus for testing the transmitter and receiver links of an I/O node. A test mode in an I/O node is initiated by a test signal driven from a test system to the I/O node via a loadboard. The I/O node may then receive test data through a peripheral bus interface. The inputting may be performed synchronously to a first clock signal. The I/O node may then transmit the test data to a receiver via a loopback mechanism on the loadboard. The transmission and reception of test data between transmitter and receiver is synchronous to a second clock signal, which has a frequency equal to the operational frequency of the transmitter and receiver. The receiver may forward the test data to the peripheral bus interface, which may in turn output the test data to the test system. The test system may then determine the results of the test.
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Chia Veechoong “Jonas”
Hewitt Larry D.
Advanced Micro Devices , Inc.
Beausoliel Robert
Heter Erik A.
Kivlin B. Noäl
Maskulinski Michael
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