Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
Reexamination Certificate
2008-03-04
2008-03-04
Meonske, Tonia L. (Department: 2181)
Electrical computers and digital processing systems: processing
Instruction decoding
Decoding instruction to accommodate variable length...
C712S209000, C712S300000, C712S233000, C711S123000, C714S053000
Reexamination Certificate
active
10720585
ABSTRACT:
This invention pertains to apparatus, method and a computer program stored on a computer readable medium. The computer program includes instructions for use with an instruction unit having a code page, and has computer program code for partitioning the code page into at least two sections for storing in a first section thereof a plurality of instruction words and, in association with at least one instruction word, for storing in a second section thereof an extension to each instruction word in the first section. The computer program further includes computer program code for setting a state of at least one page table entry bit for indicating, on a code page by code page basis, whether the code page is partitioned into the first and second sections for storing instruction words and their extensions, or whether the code page is comprised instead of a single section storing only instruction words.
REFERENCES:
patent: 5390307 (1995-02-01), Yoshida
patent: 5666510 (1997-09-01), Mitsuishi et al.
patent: 5854921 (1998-12-01), Pickett
patent: 5935237 (1999-08-01), Chiba et al.
patent: 6308258 (2001-10-01), Kubota et al.
patent: 6314504 (2001-11-01), Dent
patent: 6397379 (2002-05-01), Yates et al.
patent: 6877084 (2005-04-01), Christie
The Run-time Architecture Team, The 32-bit PA-RISC Run-time Architecture Document, 1997.
Motorola, MCF5249 Integrated ColdFire Microprocessor Product Brief, 2002.
“Demystifying EPIC and IA-64, EPIC Is a Natural Evolution of RISC, Making It Easy to Retrofit Onto RISC”, Peter Song, Microdesign Resources, Jan. 26, 1998, 7 pages.
Altman Erik R
Gschwind Michael
Luick David A.
Prener Daniel A.
Rivers Jude A.
Harrington & Smith PC
International Business Machines - Corporation
Meonske Tonia L.
LandOfFree
Extending the number of instruction bits in processors with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Extending the number of instruction bits in processors with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Extending the number of instruction bits in processors with... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3948074