Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
2007-09-28
2010-12-14
Tsai, Henry W (Department: 2184)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S037000, C712S244000
Reexamination Certificate
active
07853736
ABSTRACT:
A data transfer device arranged in a node for connection in compliance with a communication standard. The data transfer device includes a request signal generation circuit for generating request signals defined by the communication standard with different levels of priority. A determination circuit determines the request signal having the highest level of priority. Priority is given to the transfer of data corresponding to the request signal determined to have the highest level of priority by the determination circuit. A top priority request signal generation unit generates a top priority request signal that differs from the request signals defined by the communication standard. The determination circuit includes a priority determination table in which the uppermost priority request signal is set to have a level of priority that is higher than the levels of priority of the plurality of existing request signals.
REFERENCES:
patent: 5983301 (1999-11-01), Baker et al.
patent: 6219627 (2001-04-01), Bonneau et al.
patent: 2003/0069979 (2003-04-01), Horiguchi
patent: 2008/0229084 (2008-09-01), Wei et al.
patent: 10-336252 (1998-12-01), None
Fujitsu Patent Center
Fujitsu Semiconductor Limited
Nam Hyun
Tsai Henry W
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