Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2007-12-31
2010-10-12
Barnie, Rexford N (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S030000, C326S033000, C327S108000
Reexamination Certificate
active
07812639
ABSTRACT:
An integrated circuit (IC) includes an output driver circuit portion that is electrically configurable, via a configuration input, to operate in either a first mode or a second mode corresponding to an indication of a condition of the IC, such as a supply voltage indication, the first mode and the second mode having different drive characteristics. A configuration interface circuit portion as part of the improved IC is adapted to selectively override the configuration input to configure operation of the output driver circuit portion in either the first mode or the second mode based on a drive strength control input, regardless of the condition of the IC.
REFERENCES:
patent: 5337254 (1994-08-01), Knee et al.
patent: 5663664 (1997-09-01), Schnizlein
patent: 5974476 (1999-10-01), Lin et al.
patent: 6043683 (2000-03-01), Bae
patent: 6163178 (2000-12-01), Stark et al.
patent: 6496033 (2002-12-01), Rees
patent: 6624662 (2003-09-01), Volk
patent: 6807650 (2004-10-01), Lamb et al.
patent: 6909308 (2005-06-01), Hunt
patent: 6956403 (2005-10-01), Janssen
patent: 7019553 (2006-03-01), Blodgett et al.
patent: 7080341 (2006-07-01), Eisenstadt et al.
patent: 7205786 (2007-04-01), Ahmad
patent: 2004/0017220 (2004-01-01), To et al.
patent: 2005/0194991 (2005-09-01), Dour et al.
patent: 2006/0114017 (2006-06-01), El-Kik et al.
patent: 2007/0152712 (2007-07-01), Jun
Rich Howell, “Power Management: Ramp Rate Control with a Mixed-Signal FPGA”, ECN Asia Mag.com, copyright 2007, date unknown, www.ecnasiamag.com.
“Aragio Solutions Offers Suite of Programmable GPIO I/O Libraries Supporting 65nm Common Platform Technology Available for Chartered Customers”, D & R Headline News, Nov. 5, 2007, www.us-design-reuse.com.
Carlos Nieves, “FPGA Solutions: New Low-Cost FPGAs for System Integration”, The Syndicated: A Technical Newsletter for ASIC and FPGA Designers. Synplicity, Inc. Sunnyvale, CA. 2004.
“DDR2 Memory Interface Termination, Drive Strength and Loading Design Guidelines”Drive Strength. pp. 25-30. Feb. 2007. Altera Corporation.
International Search Report for International Application No: PCT/US2008/087455 dated Jul. 30, 2009.
“Aragio Solutions Offers Suite of Programmable GPIO I/O Libraries Supporting 65nm Common Platform Technology Available for Chartered Customers”, D & R Headline News. www.us-design-reuse.com, Nov. 2007.
Notification Concerning Transmittal of the International Preliminary Report on Patentability, International Application No. PCT/US2008/087455, 2 pages, mailed Jul. 15, 2010.
Heron Ralph
Iguelmamene Lakhdar
Lai Po-Shen
Sabharanjak Vaibhavi
Barnie Rexford N
Patterson Thuente Christensen Pedersen , P.A.
SanDisk Corporation
Tran Jany
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