Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-11-03
2002-10-15
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S002000
Reexamination Certificate
active
06467022
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to hard drive adapter/controllers for data processing systems and in particular to speed matching data transfers from data processing systems to memory devices connected via an adapter/controller. Still more particularly, the present invention relates to the expansion and use of the adapter memory to manage and implement data and instructions with a disk array.
2. Description of the Related Art
Adapter/controllers, hereinafter referred to as adapters, usually implemented on a printed circuit board, are often employed in today's data processing systems to interface between the data processing unit and an external bus. Various peripherals, including disk drives, may be attached to the external bus and thereby indirectly connected to the processing unit. One example of such a configuration is a Peripheral Component Interface (“PCI”) adapter and bus. The PCI bus allows attached PCI-compliant devices to perform tasks concurrently with the data processing unit.
Slots used to connect the adapter to the PCI bus are of a predetermined length which, along with internal space limitations within the data processing system, limits the physical area of the printed circuit board. Consequently, the amount of memory that an adapter board may include is limited by the amount of space available to the memory component. There are typically two memory caches on a PCI adapter: a Random Access Memory (“RAM”, either static or dynamic) buffering incoming data received from the data processing system and a non-volatile RAM (“NVRAM”), where the NVRAM is smaller and faster than the RAM and buffers writes to disk drives connected to the PCI bus.
Disk drives attached to the PCI bus may employ different configurations. “JBOD”, an acronym for Just a Bunch of Drives referring to multiple hard disk drives connected to an adapter on the data processing unit with no special treatment of data among the disks, is one such configuration. A disk array or Redundant Array of Independent Disks (“RAID”), a group of hard disk drives controlled by a single adapter and controller (a device falling within the meaning of the term “adapter” as used herein) and combined to achieve higher transfer rates than a single drive, is another. In the latter configuration, even though multiple disks are controlled by one adapter, the RAID system appears as one drive to the data processing system. Depending on the configuration, the RAID system will increase the level of protection and storage capacity for a data processing system over a single hard disk drive. The primary functions of the RAID system are to increase the availability, protection and storage capacity of data for a data processing system.
RAID technology generally splits data among the drives according to the format of the particular RAID classification (RAID 1, 2, 3, 4, 5). Copies or portions of data may be stored on more than one disk, a process referred to as “striping,” which prevents data loss in case a disk fails. By storing the data and instructions on multiple drives, access to the data is also enhanced by performing operations in parallel with multiple drives.
The RAID system, as discussed above, is an improvement over a single magnetic disk drive. However, magnetic drives, employed alone or in RAID configurations, are primarily mechanical devices, using read/write heads to transfer data, and are slow compared to Dynamic Random Access Memory (“DRAM”) or other electronic memory of the type generally employed in a data processing system. Write operations to magnetic disk drives could cause significant delays on the system bus of a data processing system utilizing the adapter and magnetic disk drive. In RAID configurations, the problem is further complicated by the striping requirements. In order to accomplish one system write to a RAID 5 disk array, for example, two drive reads and two drive writes are required, each read and write taking 10-15 milliseconds.
Write caching is therefore often employed to reduce the disparity in transfer time between the system and the disk/RAID storage device. The write cache (e.g., the NVRAM) on an adapter is employed to buffer write transactions received from the data processing system to the attached disk drives. With write caching, the adapter may complete the system-side write in 0.25-1.0 milliseconds. Because of the space limitations described above, however, the size of a write cache which may be employed is limited. The problem with a small cache is that writes are received from the data processing system every 1.0 ms and transferred to the magnetic disk drives every 35 ms. At these rates, the write cache fills up very quickly and the system is again forced to absorb the 35 ms latency associated with writing to a magnetic disk drive. RAID configurations, which employ multiple magnetic drives in parallel, may improve the latency down to 3.5 ms, but still suffer the limitations relating to write cache size.
Any gains achieved by RAID configurations may be somewhat offset by the requirements of multiple operations for each write.
FIG. 8
depicts a high level flowchart for the process of a write operation to a standard RAID storage device in accordance with the known art. The process begins in step
800
, which depicts the adapter reading old data on the data drive. The process continues to step
802
, which illustrates the adapter writing new data to the data drive. The process passes to step
804
, which depicts the adapter reading the parity associated with the old data from the parity drive. Next, the process passes to step
806
, which illustrates the adapter XORing the old and new data and old parity. Continuing, the process proceeds to step
808
, which depicts the adapter XORing the results from step
806
with parity from step
802
.
The write operation depicted in
FIG. 8
takes four steps occupying and restricting the adapter function. The inherent latency (time interval between initiation of a call for data and the time the actual transfer starts) due to the slowness of the magnetic disk drives and the extra steps required to complete a write, illustrate the amount of time consumed in the RAID write function. The instructions and data must access the adapter even if a drive-to-drive function were executed.
It would be desirable, therefore, to provide a method and apparatus for extending the NVRAM of the adapter and limiting the number of command/data transmissions and command parsing. It would further be desirable to decrease the latency of the RAID storage device with respect to the data processing system.
SUMMARY OF THE INVENTION
It is therefore, one object of the present invention to provide an extension to the adapter memory.
It is a further object of the present invention to provide logic that will relocate some instructions and designated storage areas from the adapter to the SSD.
Still further, it is an object of the present invention to decrease latency between the adapter and the RAID storage device by transferring data to the SSD and write functions to a data drive in the RAID storage device.
The foregoing objects are achieved as now described. The present invention incorporates the use of a Solid State Disk (“SSD”) and accompanying logic to extend the local memory of an adapter for RAID storage devices. Use of virtual memory, representing the SSD range of addresses in the adapter address memory, allows the adapter to incorporate the total memory into the adapter memory structure. The SSD is non-volatile and large amounts of cache items may be transferred to the SSD as an extension of the adapter memory. The cache write may be delayed and subsequently written to a designated address on a RAID drive, freeing the adapter on-board memory and control functions. Further, the size of the SSD allows for large amounts of data staging and storage, permitting device-to-device communications that would reduce the read and write commands between the host, adapter and drives. Still further, in an alternate configuration, the inv
Buckland Pat Allen
Judd Ian David
Lyons Gary Robert
Recio Renato John
Scully Michael Francis
Bracewell & Patterson L.L.P.
Emile Volel
International Business Machines - Corporation
Kim Matthew
Tran Denise
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