Extended model checking hardware verification

Details Extended model checking hardware verification Extended model checking hardware verification

2007-09-04

2007-09-04

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

10806481

ABSTRACT:
A method and computer program for verifying a design of a circuit comprises providing a model of the design; providing a first property for the design, wherein the first property describes a first behavior; checking the model using the first property and an environment of the design starting at a reset state until an example of the first behavior occurs; providing a second property for the design, wherein the second property describes a second behavior; and checking the model using the second property and an environment of the design starting at a state when the example of the first behavior occurs.

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Products / 0-In Search, O.In Design Automation, http://www.o-in.com/products—search.html, downloaded Aug. 25, 2003.
0-In Use Assertion-Based Verification to increase design performance, undated.
Design Automation website, site “Products/0-In Search” located at http:www.0-in.com/products—search.html, 4 pages, accessed and printed Mar. 3, 2004.

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