Extended drain resurf lateral DMOS devices

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257336, 257344, 257346, 257347, 257389, 257395, 257408, 437 43, 437 44, 437235, H01L 2976, H01L 21265

Patent

active

055481477

ABSTRACT:
A high voltage PMOS or NMOS transistor 7 has improved on-resistance by truncating gate field oxide 43 so that drain region 42 may be implanted closer to channel region 49 than possible otherwise. By shortening the physical distance d2 between drain 42 and channel region 49, the drain to source on-resistance of the high voltage device is reduced and the performance of high voltage device 7 is thereby improved.

REFERENCES:
patent: 5246870 (1993-09-01), Merchant
C.A.T. Salama, "Lateral Silcon Devices and High Voltage Integrated Circuits," May 1993.
Zahr Parpia and C.A.T. Salama, "Optimization of Resurf LDMOS Transistors: An Analytical Approach," IEEE Transactions on Electron Devices, Vo.l. 37, No. 3, Mar. 1990.
Taylor Efland et al, "An Optimized Resurf LDMOS Power Device Module Compatible with Advanced Logic Processes," Texas Instrumetns Incorporated, Dec. 1992.
Professor B. Jayant Baliga, "Smart Power Technology: An Elephantine Opportunity" (Invited Plenary Session Paper), IEDM 90-3, 1990 IEEE, pp. 1.1.1-1.1.4
Habekotte et al., "A Coplanar CMOS Power Switch," IEEE J. Solid-State Circuits, vol. SC-16, pp. 212-226, Jun. 1981.
J. A. Appels and H.JM.J. Vaes, High Voltage Thin Layer Devices (Resurf Devices), IEDM Proceedings 1979, pp. 238-241.

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