Extendable method for revising patterned microelectronic...

Details Extendable method for revising patterned microelectronic... Extendable method for revising patterned microelectronic...

2005-03-01

2005-03-01

Thompson, A. M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

Reexamination Certificate

active

06862722

ABSTRACT:
A method for revising a patterned conductor layer and a system for revising the patterned conductor layer employ an unoccupied equivalent wiring location. The unoccupied equivalent wiring location is provided in each of a series of wiring layout records. At least one optional wiring pattern may be formed in the unoccupied equivalent wiring location. The method and system provide for extending to all of the series of wiring layout records an optional wiring pattern and an interconnect option formed within a single one of the series of wiring layout records.

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