Exposure pattern forming method and exposure pattern

Details Exposure pattern forming method and exposure pattern Exposure pattern forming method and exposure pattern

2007-01-16

2007-01-16

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

11101479

ABSTRACT:
The present invention provides an exposure pattern forming method using a rule-based proximity effect correction method to which graphic form arithmetic operation is applied. Disclosed is an exposure pattern forming method of forming an exposure pattern by correcting each of pattern portions constituting a design pattern by a correction amount, which amount is previously prepared so as to correspond to both a line width of the pattern portion and a space width of a space portion adjacent to the pattern portion, characterized by including the steps of: subjecting the design pattern to graphic form arithmetic operation, to extract each of the pattern portions for each of target line widths, and to extract each of the space portions for each of target space widths (ST2,ST3); and subjecting each of the pattern portion extracted for each of the target line widths and the space portion extracted for each of the target space widths to graphic form arithmetic operation based on the corresponding one of the correction amounts, to thereby correct the pattern portion having each of the target line widths for each of the target space widths (ST4to ST9).

REFERENCES:
patent: 5208124 (1993-05-01), Sporon-Fiedler et al.
patent: 5553273 (1996-09-01), Liebmann
patent: 6077310 (2000-06-01), Yamamoto et al.
patent: 6243855 (2001-06-01), Kobayashi et al.
patent: 5-80486 (1993-04-01), None
patent: 8-28358 (1996-11-01), None
patent: 10-189409 (1998-07-01), None
patent: 11-168065 (1999-06-01), None

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