Photocopying – Projection printing and copying cameras – With developing
Reexamination Certificate
2001-12-11
2004-11-09
Nguyen, Henry Hung (Department: 2851)
Photocopying
Projection printing and copying cameras
With developing
C355S069000
Reexamination Certificate
active
06816230
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device fabricating equipment, and more particularly to an exposure control apparatus and an exposure control method in a lithography system.
2. Description of the Related Art
Generally, a semiconductor device of integrated circuit is fabricated by a series of repeated and selected processes such as photography, etching, diffusion, metal deposition, etc. on a wafer. In order to form device patterns designated on semiconductor wafers that are used in preparing large quantities of semiconductor devices of integrated circuits, the photolithography process for exposing photoresist patterns on a wafer is widely applied from the early days of semiconductor fabrication because the photolithography process has many advantages such as, for instance, low cost, simple manufacturing process, etc.
The commonly used photolithography process is performed according to the following steps:
The step of coating a wafer cleaned in a HMDS process with photoresist is first carried out by a resist coating apparatus called a “spinner”. The resist film coated on the wafer is heat-treated through a soft bake process for the stabilization of the resist film. After the soft bake process, the stabilized resist film is exposed with an exposure device such as “stepper” for a predetermined time, thereafter being heat-treated in a post-exposure bake process. The resist film then is developed by a developing device. Next the resist film is heat-treated in a hard bake process.
After the hard bake process, the wafer is moved to an etching station and etched by using the developed resist pattern as an etching mask.
The exposure time and the variance in temperature in the hard bake and post bake processes have been confirmed as the most likely factors affecting the quality of the device patterns. That is, in order to achieve a preferred critical dimension (CD), it is necessary to control effectively the exposure time and the bake temperature. Referring to the graphs in
FIGS. 4 and 5
, the importance of controlling the exposure time and the bake temperature will become clear.
FIG. 4
is a graph showing the changes in line widths relative to thickness of resist films and exposure time. This graph as an example shows how much the line width can be changed in the functional relationship of thickness of the resist film. The graph shows the result that only the pre-bake is performed at the temperature of about 90° C. during 30 minutes without performing a post bake. It has been found that a change of 20% in the resist's thickness corresponds to a change of 0.25 mm in its width. That is, if the resist thickness changes by 20%, the line width in process changes by 0.25 mm.
FIG. 5
shows a profile of various bake methods. It may be seen that soft baking by a hot plate has an advantage compared with other methods. Recently, prior to performing the exposure process in an in line system, a cold plate tends to be used to cool the wafer after baking the wafer by a hot plate.
In the past, a series of processes are performed by a user's manipulations as follows: measuring the bake temperature and the deviation of the temperature, manipulating the stepper's exposure time (as an instance, 0.2 seconds extended if change of 10 nm), confirming the pattern size after performing the process, etc. At that time, if the bake temperature is not uniform, the critical dimension is also bad thereby causing problems in the quality. Accordingly, the user has to manipulate the exposure time every time. And, it is not desirable that a user passively manipulates the exposure time whenever a deviation in temperature has occurred because highly integrated circuit devices require minimized and accurate sizes in their patterns.
As a result, there remains a need for an improved technique by which the exposure time can be automatically actively controlled in response to the change in the bake temperature as the critical dimension is affected even by a minute change in the bake temperature.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an exposure control apparatus and an exposure control method in a lithography system that is appropriate to the formation of a highly integrated semiconductor device pattern.
It is another object of the present invention to provide an exposure control apparatus and an exposure control method in a lithography system by which an exposure time is automatically and actively controlled in response to a change in temperature at which a resist is baked.
It is still another object of the present invention to provide an exposure control apparatus and an exposure control method in a lithography system wherein the exposure time is automatically controlled by a stepper responsive to bake temperature data obtained from a spinner in which the baking process is performed.
It is yet another object of the present invention to provide an exposure control apparatus by which an exposure time is automatically controlled and developing is accurately performed in order to achieve an accurate critical dimension for pattern on a wafer can be realized.
It is a further object of the present invention to minimize the incidence of failure in a photolithography process thereby stabilizing processes and improving yield in fabricating a semiconductor device.
In order to achieve the objects, according to a first aspect of the present invention, the exposure control method, in a lithography system including a resist coating and developing apparatus, a wafer transferring mechanism and an exposure control apparatus, comprises the steps of:
transmitting to the exposure control apparatus temperature data for heat-treating a resist film in the resist coating and developing apparatus;
determining a resist film exposure time responsive to the temperature data; and
on a wafer which is transferred by the wafer transferring mechanism exposing the resist film the determined exposure time.
According to a second aspect of the present invention, the exposure control apparatus in a lithography system, including a resist coating and developing apparatus and a wafer transferring mechanism, comprises:
a receiver for receiving resist film heat treating temperature data from the resist coating and developing apparatus;
an optical system controller adapted to determine and control the resist film exposure time responsive to the resist film heating treating data.
According to the exposure control method and the exposure control apparatus in a lithography system as described above, the critical dimensions are achieved during the lithography process, thereby improving yield in fabricating a semiconductor device and stabilizing fabrication processes.
REFERENCES:
patent: 5097291 (1992-03-01), Suzuki
patent: 5693439 (1997-12-01), Tanaka et al.
patent: 6051349 (2000-04-01), Yoshioka et al.
patent: 6424417 (2002-07-01), Cohen et al.
Marger & Johnson & McCollom, P.C.
Nguyen Henry Hung
Samsung Electronics Co,. Ltd.
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