Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1996-09-10
1998-09-01
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
711141, 711169, 395726, G06F 1214
Patent
active
058025820
ABSTRACT:
A method and apparatus for maintaining cache coherence in a shared memory multiprocessor system, where cache coherence is preserved between lock acquires and releases rather than at every single memory load and store. With this invention, a Global Lock Manager (GLM) keeps track of the status of locked ranges without the need to maintain a list of individual processors in the system. Further a Recently Acquired Lock Manager (RALM) keeps track of the status of locked ranges within a processing node to reduce the need to communicate with a GLM.
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Ekanadham Kattamuri
Lim Beng-Hong
Pattnaik Pratap Chandra
Cameron Douglas W.
Chan Eddie P.
International Business Machines - Corporation
Nguyen Hiep T.
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