Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2007-05-22
2007-05-22
Rinehart, Mark H. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S306000, C326S030000
Reexamination Certificate
active
10738293
ABSTRACT:
A bus system for use with addressable memory has a global bus of bidirectional signal lines. The global bus has a first end and a second end. A master device transmits data to and receives data from the global bus at the first end. A global bus terminator is coupled to the global bus at the second end. One or more slave devices, including a last slave device at a furthest distance from the master device, each includes an active terminator coupled to at least some of the bidirectional signal lines of the global bus. The active terminator of only the last slave device is enabled.
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Rambus, Inc., “Rambus Technology Overview”, Feb. 1999, pp. 1-62.
Barth Richard M.
Donnelly Kevin S.
Garlepp Bruno W.
Garrett, Jr. Billy W.
Gasbarro James A.
Huynh Kim T.
Morgan & Lewis & Bockius, LLP
Rambus Inc.
Rinehart Mark H.
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