Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1998-07-07
2001-04-24
Ray, Gopal C. (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S120000, C710S119000
Reexamination Certificate
active
06223237
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a communication bus for interconnecting devices in a computer system. More particularly, this invention relates to a communication bus comprising multiple individual busses that allow data to be transferred between devices at varying datawidths.
PROBLEM
A computer system has multiple devices that share data to perform the functions provided by the system. For purposes of the present discussion, a device is a system component that performs a specific function to process data. Examples of devices include a processor, video drivers with connected displays, disk drives, keyboards, mouses, printers, and network interfaces. In the computing arts, it is a problem to increase the speed or throughput of data transfers between these devices. For example, video drivers must quickly receive great amounts of data to produce animated graphics. If the data transfer is slow, the animated graphics tend to have pauses and do not appear to have a continuous motion when viewed on a monitor. In order to avoid this and other problems, those skilled in the computing arts are always attempting to improve throughput of the transfer of data between devices.
In computer systems, the transfer of data between devices is completed over a communication path known as a communication bus. The datawidth or amount of data that a communication bus can carry per transfer is significant factor in improving the throughput of data transfers. The datawidth of a communication bus is the number of bits that can be carried at one time by a bus. The number of bits that can be carried by the bus is determined by the number of data lines in the bus. For example, a thirty-two bit bus has thirty-two data lines for carrying data between devices.
It is a problem to simply add more data lines to a bus to increase throughput. One problem is that the cost of manufacturing chips and connectors for connecting devices to the bus increases as the number of data lines increases. A second problem is that power consumption increases as more data lines are added because more power is needed to generate the greater number of signals transmitted over the bus. This is a significant problem in computer systems which have a limited power supply. One example of such a system is a “Laptop PC” having a battery for a power supply. A third problem is that the size of the bus increases which is unacceptable when space inside a system is at a premium.
Additionally, the throughput of a bus is limited by the length of the bus and the number of devices connected to the bus. The length of a bus becomes a limiting factor because as the length of the bus increases, the amount of time needed for signals and signal reflections to travel along the bus between devices increases. The number of devices connected to the bus is a limiting factor because as the number of devices increases, the amount and time required to change the state of signals increases.
It is a further problem that a bus can only be used to perform one transfer between devices at one time. In order to transmit or receive data over the bus, a device must be the bus master of the communication bus. A bus master is the device that controls data transfers over the bus. A communications bus can only have one bus master at any given time. This is a problem if more than one device require a data transfer at the same time. An arbitration system is required to determine which device may transfer data over the communications bus at a given time. This ensures that each device is allowed to transfer the required data.
SOLUTION
The above and other problems are solved and an advance in the computing arts is made by the provision of an expandable communications bus system. In accordance with this invention, a communication bus system has m identical communication busses. Each communication bus has n data lines. For example, a preferred exemplary embodiment has 2 communication busses that each have 32 data lines. Devices connected to the communication bus system transfer yn bits of data at one time by connecting to y busses where y is less than m. For example, a 64-bit device connected to the bus system of the preferred embodiment can connect to one bus to transfer 32 bits of data or both busses to transfer 64 bits of data. Each different bus in the expandable bus system can be transferring data between different devices at the same time. For example, a first bus may be used to transfer data between a first and second device while a second bus is being used to transfer data between a third and a fourth device. The expandable bus system also reduces the amount of control lines needed in each bus which allows multiple busses to be added to the system without greatly increasing the cost, size, or power consumption of each bus.
The communications bus system of the present invention includes m communication busses with each bus having n data lines and q control lines. Each device has x bus interfaces connecting the device to a set of x busses wherein x may be different for each of the device in the system. For example a preferred exemplary embodiment, a first device connected to the bus system is connected to both busses, a second device connected to the system is connected to both busses, a third device is connected to the first bus, and a fourth device is connected to the second bus.
Data transfers over the m busses are controlled by the bus interfaces connected to each communication bus. When a device requires a data transfer of zn bits of data, the x interfaces in the device attempt to use z amount of the m busses to complete the transfer in one cycle where z is less than m. If z is greater than m or z busses cannot be used to complete the transfer in one cycle, a burst or multiple consecutive data transfers over the busses must be performed to complete the transfer. For example, a first device may require a transfer of 64-bits to a second device in the preferred embodiment. The first device would signal each interface connecting the device to the two busses in the system that the device requires control of both busses for a data transfer. The interface would then each attempt to control the connected bus. If the device receives control of only the first bus, the device will complete the transfer in two transfer cycles over the first bus. If the first device receives control of both busses the first device will transfer data to the second device in one cycle over each bus
In order to allow each device to be connected to a set of x busses, a diagnostic operation must be performed during a system initialization to determine which devices are connected to which busses. One example of system initialization is when a user turns on a computer system. The information about the devices connected to each of the m busses is stored in a memory of each bus interface in every device connected to the system. The information is used by the bus interfaces to determine whether a bus can be used to transfer data between devices as set out below.
The following process is used to transfer data between a first device and a second device over the expandable communication bus system. When the first device requires a data transfer, a signal is transmitted to each of the x bus interfaces in the first device connecting the first device to the x busses. Each of the x interfaces determines whether the second device is connected to the bus that is also connected to the interface. Each of the x Interfaces that are connected to a bus connected to the second device determine whether the first device is the master of the bus. The x interfaces that do not have control of the connected bus determine if the first device is the master of other busses that are able to complete the transfer. If the first device controls other busses that can complete the entire data transfer in one cycle, the controlled busses divide the data and transfer the data over the respective busses. If busses controlled by a first device cannot complete the transfer in one cycle, each bus interface in the first device tha
Adaptive Systems, Inc.
Duft, Graziano & Forest, P.C.
Ray Gopal C.
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