Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
Reexamination Certificate
2007-04-05
2010-12-14
Zhen, Li B (Department: 2195)
Electrical computers and digital processing systems: virtual mac
Task management or control
Process scheduling
C718S100000, C718S104000, C718S108000
Reexamination Certificate
active
07853950
ABSTRACT:
Provided are a method, system, and program for executing multiple threads in a processor. Credits are set for a plurality of threads executed by the processor. The processor alternates among executing the threads having available credit. The processor decrements the credit for one of the threads in response to executing the thread and initiates an operation to reassign credits to the threads in response to depleting all the thread credits.
REFERENCES:
patent: 5396616 (1995-03-01), Venable
patent: 6615217 (2003-09-01), Rosensteel et al.
patent: 7174554 (2007-02-01), Pierce et al.
patent: 7207042 (2007-04-01), Smith et al.
patent: 7366878 (2008-04-01), Mills et al.
patent: 7426731 (2008-09-01), Findeisen
patent: 7472389 (2008-12-01), Smith et al.
patent: 7647483 (2010-01-01), Bates et al.
patent: 2003/0158885 (2003-08-01), Sager
patent: 2003/0225816 (2003-12-01), Morrow et al.
patent: 2004/0187120 (2004-09-01), Moore et al.
patent: 2005/0076335 (2005-04-01), Cavage et al.
patent: 2005/0096970 (2005-05-01), Weber
patent: 2005/0141424 (2005-06-01), Lim et al.
patent: 2005/0188373 (2005-08-01), Inoue et al.
patent: 2005/0210471 (2005-09-01), Okawara
patent: 2005/0235285 (2005-10-01), Monasterio
patent: 2006/0037025 (2006-02-01), Janssen et al.
patent: 2006/0150184 (2006-07-01), Hankins et al.
patent: 2006/0179284 (2006-08-01), Jensen et al.
patent: 2006/0190945 (2006-08-01), Kissell
patent: 2006/0195683 (2006-08-01), Kissell
patent: 2006/0277126 (2006-12-01), Rosenbluth et al.
patent: 2008/0104600 (2008-05-01), May
patent: 2008/0134185 (2008-06-01), Fedorova
patent: 2008/0163230 (2008-07-01), Latorre et al.
patent: 2008/0168447 (2008-07-01), Lewis
patent: 2009/0083508 (2009-03-01), Otero Perez et al.
N. Vouk; Buddy Threading in Distributed Applications on Simultaneous Multi-Threading Processors; Master's Thesis; Computer Science Department; Raleigh, North Carolina 2005.
McKusick et al., “The Design and Implementation of the 4.4 BSD Operating System” ISBN 0201549794, date: Apr. 30, 1996; pp. 12.
David B. Stewart and Pradeep K. Khosla; Mechanirms for Detecting and Handling Timing Errors; Communications of the ACM Jan. 1997/vol. 40, No. 1; pp. 87-93.
Z. Deng; An Open Environment for Real-Time Applications; The International Journal of Time-Critical Computing Systems, 16, 155-185 (1999).
McKusick et al., “The Design . . . 4.4 BSD Operating System” ISBN 0201549794, Apr. 30, 1996.
M.N. Yankelevsky, et al., “a-Coral: A Multigrain, Multithreading Processor Architecture”, Proceedings of the 15th Int'l Conf. on Supercomputing, ACM 2001, pp. 358-367.
J. Nakajima, “Enhancements for Hyper-Threading Technology in the Operating Systems—Seeking the Optimal Scheduling”, USENIX Association, Proceedings of 2nd Workshop on Industrial Experiences with Systems Software, Dec. 2002, pp. 1-15.
Al Kawsar Abdullah
International Business Machines Corporarion
Konrad Raynes & Victor LLP
Victor David W.
Zhen Li B
LandOfFree
Executing multiple threads in a processor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Executing multiple threads in a processor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Executing multiple threads in a processor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4199353