Exception-based timer control

Details Exception-based timer control Exception-based timer control

2007-06-20

2010-11-09

Chan, Eddie P (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

Reexamination Certificate

active

07831818

ABSTRACT:
A processing device includes a timer and an exception controller configured to provide an exception indicator representative of a first exception. The processing device further includes a timer controller configured to selectively enable/disable the timer in response to the exception and based on a characteristic of the exception. A method of utilizing the processing device includes receiving an exception and determining a characteristic of the exception. The method further includes, at a first time, selectively enabling/disabling the timer of the processing device based on the characteristic, and, at a second time subsequent to the first time, accessing a count value stored at the timer. The method further includes providing the count value for output from the processing device.

REFERENCES:
patent: 4090239 (1978-05-01), Twibell et al.
patent: 4926319 (1990-05-01), Wilkie et al.
patent: 5392052 (1995-02-01), Eberwine
patent: 5541943 (1996-07-01), Niescier et al.
patent: 5568649 (1996-10-01), MacDonald et al.
patent: 5740451 (1998-04-01), Muraki et al.
patent: 5751735 (1998-05-01), Tobin et al.
patent: 5812830 (1998-09-01), Naaseh-Shahry et al.
patent: 6145103 (2000-11-01), Typaldos et al.
patent: 6553513 (2003-04-01), Swoboda et al.
patent: 6601189 (2003-07-01), Edwards et al.
patent: 6658555 (2003-12-01), Kahle et al.
patent: 6839654 (2005-01-01), Rollig et al.
patent: 6986026 (2006-01-01), Roth et al.
patent: 7073097 (2006-07-01), Kuwayama
patent: 7159144 (2007-01-01), Babu et al.
patent: 7162410 (2007-01-01), Nemecek et al.
patent: 7334161 (2008-02-01), Williams et al.
patent: 2003/0126502 (2003-07-01), Litt
patent: 2004/0260913 (2004-12-01), Babu et al.
patent: 2006/0117224 (2006-06-01), Wu
patent: 2007/0053301 (2007-03-01), Maruoka et al.
patent: 2007/0198759 (2007-08-01), Agarwal
patent: 2008/0184055 (2008-07-01), Moyer et al.
patent: 2008/0184056 (2008-07-01), Moyer et al.
International Search Report for corresponding PCT Application No. PCT/US08/64200 mailed Oct. 28, 2008.
U.S. Appl. No. 11/668,780, filed Jan. 30, 2007 entitled “Instruction-Based Timer Control During Debug”.
“MC68HC912D60A/D”, Rev. 3.1, Freescale Semiconductor,Inc., Aug. 2005, pp. 74-77; 140; 168-174; 223-262; 370-403.
U.S. Appl. No. 11/668,780, Office Action mailed May 4, 2009.
U.S. Appl. No. 11/668,787, Office Action mailed May 19, 2009.
U.S. Appl. No. 11/668,787, Final Office Action mailed Feb. 24, 2010, 13 pages.
U.S. Appl. No. 11/668,780, Notice of Allowance mailed Nov. 13, 2009, 6 pages.
U.S. Appl. No. 11/668,780, Office Action mailed Apr. 5, 2010, 15 pages.
Notice of Allowance mailed Aug. 10, 2010 for U.S. Appl. No. 11/668,780, 6 pages.
Notice of Allowance mailed Jun. 30, 2010 for U.S. Appl. No. 11/668,787, 14 pages.

Affiliated with

Also associated with

Rating

Exception-based timer control does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Exception-based timer control, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Exception-based timer control will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4151043