Event vector table override

Details Event vector table override Event vector table override

2000-09-28

2004-07-06

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Interrupt processing

C261S004000, C261S050300

Reexamination Certificate

active

06760800

ABSTRACT:

TECHNICAL FIELD
This invention relates to pipelined processors, and more particularly to overloading interrupts in pipelined processors.
BACKGROUND
Digital signal processing is concerned with the representation of signals in digital form and the transformation or processing of such signal representation using numerical computation. Digital signal processing is a widely used technology for many of today's high technology products in fields such as wireless communications, networking, and multimedia. One reason for the prevalence of digital signal processing technology has been the development of low cost, powerful digital signal processors (DSPs) that provide the reliable computing capability to implement these products cheaply and efficiently. Since the development of the first DSPs, DSP architecture and design have evolved to the point where even sophisticated real-time processing of video-rate sequences may be performed.
DSPs are often used for a variety of multimedia applications such as digital video, imaging, and audio. DSPs may manipulate the digital signals to create and open such multimedia files.
MPEG-1 (Motion Picture Expert Group), MPEG-2, MPEG-4 and H.263 are digital video compression standards and file formats. These standards achieve a high compression rate of the digital video signals by storing mostly changes from one video frame to another, instead of storing each entire frame. The video information may then be further compressed using a number of different techniques.
The DSP may be used to perform various operations on the video information during compression. These operations may include motion search and spatial interpolation algorithms. The primary intention is to measure distortion between blocks within adjacent frames. These operations are computationally intensive and may require high data throughput.
The MPEG family of standards is evolving to keep pace with the increasing bandwidth requirements of multimedia applications and files. Each new version of the standard presents more sophisticated algorithms that place even greater processing requirements on the DSPs used in MPEG compliant video processing equipment.
Video processing equipment manufacturers often rely on application-specific integrated circuits (ASICs) customized for video encoding under the MPEG and H.263 standards. However, ASICs are complex to design, costly to produce and less flexible in their application than general-purpose DSPs.


REFERENCES:
patent: 5943507 (1999-08-01), Cornish et al.
patent: 6148321 (2000-11-01), Hammond
patent: 0 786 726 (1997-07-01), None
patent: 0 992 902 (2000-04-01), None

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