Even-number-stage pulse delay device

Details Even-number-stage pulse delay device Even-number-stage pulse delay device

2009-12-16

2010-11-02

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

C326S094000, C326S096000

Reexamination Certificate

active

07825696

ABSTRACT:
The even-number-stage pulse delay includes a ring delay line constituted of an even number of inverter circuits connected in a ring around which main edge and a reset edge circulate together. The even-number-stage pulse delay is provided with an operation monitoring section configured to detect whether or not the main and reset edges are circulating around the ring delay line.

REFERENCES:
patent: 5416444 (1995-05-01), Yamauchi et al.
patent: 5477196 (1995-12-01), Yamauchi et al.
patent: 5525939 (1996-06-01), Yamauchi et al.
patent: 7710208 (2010-05-01), Goff
patent: 06-216721 (1994-08-01), None
patent: 07-183800 (1995-07-01), None
patent: 07-312288 (1995-11-01), None

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