Semiconductor device manufacturing: process – With measuring or testing – Optical characteristic sensed
Reexamination Certificate
2000-02-09
2002-10-29
Sherry, Michael (Department: 2829)
Semiconductor device manufacturing: process
With measuring or testing
Optical characteristic sensed
C438S017000, C324S1540PB
Reexamination Certificate
active
06472238
ABSTRACT:
TECHNICAL FIELD
The subject invention relates to the analysis of optical metrology data obtained from measurements on semiconductors. The invention is particularly related to analyzing data obtained from a sample subjected to etching processes.
BACKGROUND OF THE INVENTION
A number of optical metrology tools have been developed to monitor various processes used during the fabrication of semiconductor wafers. One such tool is marketed by the assignee herein under the name Opti-Probe. This tool includes a number of measurement technologies integrated into one device. These measurement technologies include Beam Profile Reflectometry, Beam Profile Ellipsometry, Broad Band Spectrometry, Spectroscopic Ellipsometry and Absolute Ellipsometry. More details about this tool can be found in PCT WO 99/02970 published Jan. 21, 1999.
In a semiconductor fabrication facility, a tool like the Opti-Probe might be used to evaluate a variety of types of semiconductor samples. The samples have a wide range of characteristics including the number and types of layers. For any particular sample, one or more measurement technologies found in the Opti-Probe will be best suited to provide the needed analysis. For a new type of sample, applications engineers will develop a “recipe” for using the Opti-Probe that achieves the most accurate evaluation of the samples in the least amount of time. For example, a certain sample might best be analyzed with a combination of measurements from the Beam Profile Reflectometry module and the Spectroscopic Ellipsometer module.
In addition to selecting the best measurement technologies, a mathematical model must be designed to permit accurate mapping of the data. The mathematical model will have a layered structure corresponding to the expected layer structure on the sample. Such an expected layer structure might include a top metal layer and a bottom layer of silicon dioxide, both formed on a silicon substrate. The processor will be seeded with information about the expected parameters of each layer of the sample. Examples of these parameters include thickness, index of refraction and extinction coefficient of the layer. Using Fresnel equations, the processor will calculate theoretical measurements results for each of the measurement technologies which were used. These theoretical results are compared with the actual measured data. If the calculated theoretical data does not match the actual measured data, the starting parameters will be modified and theoretical measurement results will be calculated again and compared to the measured data. These steps are repeated in an iterative process until the calculated data closely matches the actual measured data. At this point, the theoretical parameters are considered to represent the parameters of the actual sample.
Various algorithms such as least squares fitting algorithms can be used to derive the solution through an iterative process. Additional details relating to the development of a recipe and how it would be used to evaluate a sample can be found in “Simultaneous Measurement of Six Layers in a Silicon on Insulator Film Stack Using Spectrophotometry and Beam Profile Reflectometry,” Leng, et. al.,
Journal of Applied Physics
, Vol .81, No. 8, Apr. 15, 1997. See also “Using Genetic Algorithms with Local Search for Thin Film Metrology,” Land et. al.,
Proceedings of the Seventh International Conference on Genetic Algorithms
, Michigan State University, Jul. 19-23, 1997.
With the advent of sub-micron feature sizes, dry (plasma) etching has become one of the most important processes in semiconductor manufacturing. Fluorocarbon gases are often used as the primary media for removing silicon dioxide from silicon or a polycrystalline silicon surface. The plasma affects the etching process both physically and chemically. At the end of the process, the wafer will often have a thin top film layer of a polymer or amorphous fluorosilicon. If the etching process was not fully complete, there will also be a thin layer of silicon dioxide remaining on the wafer. In this case, the wafer is considered “under etched.” If the etching process removes all of the silicon dioxide, the wafer is considered “over etched.” In the latter case, the process will often create a damaged silicon or polycrystalline layer. In order to successfully control the etch process, the metrology tool needs to be able to measure the fluorosilicon layer, any silicon dioxide layer remaining and the thickness of any damage layer caused by the process.
One problem with obtaining good measurement results when analyzing etched structures as described above is that it is difficult to develop one mathematical model or recipe which adequately defines both the over etched and under etched situation. The subject invention is intended to address this problem.
SUMMARY OF THE INVENTION
In accordance with the subject invention, a new approach has been developed to improve the accuracy of the analysis of data associated with etch procedures. In this approach, separate recipes are developed for both the over etched and under etched conditions. In a preliminary stage, the processor makes a relatively simple analysis of selected reflectivity data to determine whether the sample is over or under etched. Once this initial determination is made, the processor will apply the appropriate recipe (either over or under etched) to complete the analysis of the data. The initial analysis can also be used to determine which measurement technologies are best suited to complete the evaluation of the sample. This two step process provides for a more accurate analysis of the data.
The subject approach would have utility for the evaluation of samples subjected to other forms of layer treatment processes. For example, another well known layer treatment process is CMP (chemical mechanical polishing or planarization). In this process, irregularities on the surface of a dielectric film are reduced by polishing the surface with a chemical slurry. The subject system could be used to initially determine the extent to which the layer had been removed and then, based on that information, apply the appropriate analytical recipe to analyze the sample.
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Patel Paresh
Sherry Michael
Stallman & Pollock LLP
Therma-Wave, Inc.
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