Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2007-08-14
2007-08-14
Smith, Zandra V. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S151000
Reexamination Certificate
active
10735627
ABSTRACT:
The reliability of a GOLD structure TFT depends on an impurity concentration in its gate-overlapped region. Thus, it is an object of the present invention to obtain a resistance distribution corresponding to a tapered shape of a gate electrode in a gate-overlapped region. According to the present invention, plural TEGs are manufactured as Lov resistance monitors in which mask alignment is misaligned with several μm interval to perform a resistance measurement on each of the TEGs. Consequently, a resistance distribution corresponding to a tapered shape can be obtained in a channel forming region, a gate-overlapped region and a source/drain region.
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Asano Etsuko
Nakamura Osamu
Sakakura Masayuki
Costellia Jeffrey L.
Nixon & Peabody LLP
Perkins Pamela E
Semiconductor Energy Laboratory Co,. Ltd.
Smith Zandra V.
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