Evaluation chip

Details Evaluation chip Evaluation chip

2007-01-02

2007-01-02

Auve, Glenn A. (Department: 2111)

Electrical computers and digital data processing systems: input/

Interrupt processing

Interrupt prioritizing

C710S266000

Reexamination Certificate

active

10989025

ABSTRACT:
An evaluation chip is disclosed whose interrupt priority order can be changed freely. A plurality of interrupt priority order determining circuits20-1to2-4perform a logical operation on a plurality of signals S11to S14used for interrupt priority order modifying control that are applied from outside and a plurality of interrupt signals S31-1to S31-4, and output interrupt modifying signals S24-1to S24-4. A plurality of interrupt modules30-1to30-4perform a logical AND operation on the plurality of signals S24-1to S24-4and a plurality of interrupt request signals S15-1to S15-4that are applied from outside, and output the signals S31-1to S31-4. An address generating circuit40encodes the plurality of signals S31-1to S31-4and generates interrupt vector addresses40. A microcomputer core50executes interrupt instructions that have been fetched from an external program memory100, based on the addresses S40.

REFERENCES:
patent: 5594905 (1997-01-01), Mital
patent: 6539448 (2003-03-01), Deng
patent: 2004/0199694 (2004-10-01), Yiu et al.
patent: 2005/0010707 (2005-01-01), Francis
patent: 2005/0102460 (2005-05-01), Wahler
patent: 5-151014 (1993-06-01), None

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