Evaluation and optimization of code

Details Evaluation and optimization of code Evaluation and optimization of code

2005-04-19

2005-04-19

McLean-Mayo, Kimberly (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S165000, C711S156000

Reexamination Certificate

active

06883067

ABSTRACT:
A memory map evaluation tool is provided that organizes a program in a manner most compatible with use of a cache. The tool includes a method that involves executing a first version of the program according to a first memory map to generate a program counter trace, converting the program counter trace into a specific format and then translating the program counter trace into physical addresses using a memory map to be evaluated, different from the first memory map. Those physical addresses are then used to evaluate the number of likely cache misses using a model of a direct-mapped cache for the memory map under evaluation.

REFERENCES:
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patent: 5963972 (1999-10-01), Calder et al.
patent: 6272599 (2001-08-01), Prasanna
patent: 20030097538 (2003-05-01), Hall et al.

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