Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Patent
1996-12-30
1998-11-17
Saadat, Mahshid D.
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
257 57, H01L 2358, G01R 3126
Patent
active
058380221
ABSTRACT:
Time coefficient .beta., voltage coefficient d and temperature coefficient .phi..sub.0 of a jumbo TFT including a plurality of TFTs connected parallel to each other and manufactured under the same condition are obtained through experiment using -BT stress test, mean value .mu. and standard deviation .sigma. of the threshold voltage shift amount are calculated by -BT stress test for a plurality of individual TFTs, and the life t of the individual TFT is evaluated by the expression. ##EQU1##
REFERENCES:
patent: 4899105 (1990-02-01), Akiyama
patent: 5608338 (1997-03-01), Maeda
"Mechanism of Negative-Bias Temperature Instability in Polycrystallinesiicon Thin Film Transistors" Madea et al., Journal of Applied Physics, vol. 76 (12), 1994, pp. 8160-8166, No Month.
"Appearance of Single-Crystalline Properties in Fine-Patterned Si Thin Film Transistors (TFTs) by Solid Crystallization (SPC)", Noguchi, Journal of Applied Physics, vol. 32, 1993, pp. L1584-L1587 no month.
Guay John F.
Mitsubishi Denki & Kabushiki Kaisha
Saadat Mahshid D.
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