Ethernet media access controller embedded in a programmable...

Details Ethernet media access controller embedded in a programmable... Ethernet media access controller embedded in a programmable...

2005-01-21

2008-12-16

Suryawanshi, Suresh K (Department: 2115)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S501000, C713S502000

Reexamination Certificate

active

07467319

ABSTRACT:
A clock interface for a media access controller in a programmable logic device is described. The media access controller includes a clock generator for providing a clock signal to configured configurable routing of the programmable logic device to obtain a loaded version thereof. The loaded clock signal is provided to a clock network of the media access controller and to a delay cell of the media access controller to obtain an indication of the loading by the user instantiated design.

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