Etching process for organic anti-reflective coating

Details Etching process for organic anti-reflective coating Etching process for organic anti-reflective coating

1997-12-31

2002-05-21

Utech, Benjamin L. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S710000, C438S711000, C438S712000, C438S714000

Reexamination Certificate

active

06391786

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an improved method for etching organic anti-reflective coatings (ACR's) in the fabrication of integrated circuits.
BACKGROUND OF THE INVENTION
Electronic, solid state microchips such as those in computer microprocessors, hold thousands of individual systems each of which is made up of thousands of individual electronic components such as transistors, resistors, and capacitors. The manufacture of solid state electronic devices relies on assembling layers of semiconducting, conducting, and insulating materials in precise patterns and uniform thicknesses, selectively etched to create electronic components and systems according to the functions desired. Because the components and systems are all made into one chip, or substrate, and interconnected, these circuits are appropriately termed “integrated circuits.”
The production of integrated circuits is highly competitive. Therefore improving the efficiency of the manufacturing steps means a competitive advantage. Typically, the production of integrated circuits requires fabricating one or more networks of conductive pathways interconnecting the components to form systems and interconnecting the systems to form circuits. An important manufacturing step is the formation of a network of conducting pathways, or interconnecting network, over a semiconducting substrate via photolithography and etching (collective these processes are referred to “patterning”). This is typically accomplished by coating a conductive, metallic layer, with a light sensitive coating, i.e., a photoresist coating (“photoresist”). The photoresist is then exposed to actinic light through a mask which blocks the light in a pattern corresponding to the pattern desired for the conducting interconnecting network.
The photoresist coating is subsequently “developed,” that is, the parts of the photoresist coating which were exposed to the actinic light are selectively removed, thereby exposing the conductive surface below in a pattern corresponding to the openings in the mask. Usually the exposed metal layer is removed by plasma etching, but may also be removed by wet chemical etching, leaving the desired interconnecting network.
The demand in recent years for greater miniaturization of integrated circuits has led to increased circuit density, which requires shorter wavelength light such as deep ultraviolet (UV) to expose the photoresist. While the short wavelength light theoretically should yield exposures of high resolution, unfortunately it tends to reflect off the metallic layer back through the photoresist layer. This reflection sets up interference with the incoming light which reduces resolution. A discussion of this phenomenon can be found in
Silicon Processing for the VLSI Era
, S. Wolf, et al., v. 1, “Process Technology,” Lattice Press, Sunset Beach, Calif. (1987). To solve this problem, an anti-reflective coating (ARC) is typically deposited on the metallic layer before the photoresist layer to reduce the unwanted reflection and consequential loss of resolution. The ARC's widely used in the integrated circuit industry are polyimides although other organic anti-reflective material can be used.
After the photoresist has been exposed to UV and developed, the ARC must be removed by etching to uncover the underlying conductive, metallic layer or coating. The prior art teaches that this may be done by plasma etching. However, a system of etching agents and conditions must be used which effectively etch away the ARC but leave the photoresist relatively intact.
U.S. Pat. No. 5,655,110, “Krivokapic et al.,” incorporated herein by reference, discusses the importance of maintaining critical dimensions during etching operations in mass produced semiconductor wafers. U.S. Pat. No. 5,126,289, “Ziger,” teaches a method of etching the photoresist layer and the underlying aluminum layer in one operation using ionized carbon tetrachloride as the etching agent. However, Ziger is silent regarding degradation of the photoresist.
Thuy B. Ta in U.S. Pat. No. 5,308,742 (“Ta”), incorporated herein by reference, claims a method of manufacturing an integrated circuit which includes a step of plasma etching a polyimide ARC using trifluoromethane (CHF
3
) and elemental oxygen (O
2
) with argon as a carrier gas. This patent asserts that CHF
3
promotes polymer formation while the argon acts as a sputter component which removes the polymer formed by CHF
3
. The sputter component travels primarily in a vertical direction so that the polymeric material on the sidewalls of the interconnecting network etched through the photoresist is not removed. This protects the sidewalls of the photoresist from lateral attack by oxygen. Purportedly, this method provides critical dimension control because it is selective for the ARC.
In Ta, oxygen appears to be the actual etching agent. Oxygen is an aggressive oxidizing agent and tends to be non-specific and detrimental to some solid state components. A milder oxidizing agent would offer greater selectivity between the ARC and the photoresist, and hence, an improvement over the process of Ta. Selectivity is important because the CHF
3
would not provide protection in the vertical direction if Ar sputtering removes CHF
3
deposited on top of the photoresist. Excessive erosion impairs the photoresist's masking properties during the etching of the ARC and/or underlying conductive coating.
We have found an improved process for selectively and effectively removing an ARC without the use of oxygen, thus, reducing degradation of the photoresist.
SUMMARY OF THE INVENTION
A first aspect of the present invention is a process for etching an organic ARC on a metallic substrate comprising exposing the ARC to a system of etching agents in an ionized state in a reaction chamber of a plasma generating device, the system of etching agents including one or more fluorine-containing compounds, an inert carrier and chlorine. This process is particularly useful for preserving the critical dimensions of a photoresist while removing exposed areas of an organic ARC during the manufacturing of an integrated circuit.
A second aspect is a formulation of one or more fluorine-containing compounds, an inert carrier gas and chlorine which is employed in the process of the first aspect. In one embodiment of the formulation, the fluorine-containing compound is selected from the group consisting of CF
4
, CHF
3
, C
2
F
6
, CH
2
F
2
, SF
6
, C
n
F
n+4
. In a particular embodiment the fluorine-containing compound is CHF
3
and the inert carrier is argon.


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“Dry Etching of Bottom Anti-Reflective-Coat and its Application to Gate Length Control”, A. Nishizawa, et al., IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings, XP-002099210, Oct. 6-8, 1997, pp. F13-F16.
Silicon Processing for the VLSI Era, Stanley Wolf et al., 1987, Process Technology, Lattice Press, Sunset Beach, CA, vol. 1, pp. 438-441.

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