Etching process for a two-layer metallization

Details Etching process for a two-layer metallization Etching process for a two-layer metallization

2005-01-11

2005-01-11

Deo, Duy-Vu (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S706000, C438S714000, C438S723000, C438S724000, C438S725000

Reexamination Certificate

active

06841481

ABSTRACT:
The novel etching process for a two-layer metallization, or dual damascene patterning, is simple and cost-effective to carry out and reliably prevents fences from forming during the etching process in the region of the polymer intermediate layer. The etching of the oxide layer and of the polymer intermediate layer for the dual damascene patterning is effected by a CF4ARC open process with high selectivity with respect to the photoresist with a lengthened etching time.

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