Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2008-07-29
2008-07-29
Goudreau, George A. (Department: 1792)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S701000, C438S714000, C438S719000, C216S067000, C216S072000, C216S074000
Reexamination Certificate
active
07405162
ABSTRACT:
An etching method forms an opening with a substantially vertical profile extending to a stopper layer by performing an etching with a plasma of an etching gas acting on an object to be processed loaded in an evacuable processing vessel, wherein the object has a mask layer of a predetermined pattern, a silicon layer to be etched formed below the mask layer and the stopper layer formed below the silicon layer. The etching method includes a first etching process for forming an opening with a tapered wall surface in the silicon layer by using a first etching gas including a fluorine-containing gas and O2but not HBr; and a second etching process for etching the opening by using a second etching gas including a fluorine-containing gas, O2and HBr.
REFERENCES:
patent: 4560436 (1985-12-01), Bukhman et al.
patent: 4980316 (1990-12-01), Huebner
patent: 6461934 (2002-10-01), Nishida et al.
patent: 2005/0029221 (2005-02-01), Chang et al.
Hirai Nozomi
Hirayama Yusuke
Maruyama Koji
Mimura Takanori
Goudreau George A.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Tokyo Electron Limited
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