Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1999-02-23
2000-07-04
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438723, 438743, H01L 2100
Patent
active
060838450
ABSTRACT:
An etching method used in the high density plasma etching system to etch a silicon oxide dielectric layer to form openings of different depths. The method uses a mixture of C.sub.4 H.sub.8, CH.sub.2 F.sub.2, and Ar as an etching gas source to etch the silicon oxide dielectric layer, forming a plurality of openings of a first depth. A mixture of C.sub.4 H.sub.8, CO, and Ar is used as an etching gas source to etch the silicon oxide dielectric layer exposed by the first opening, so that the opening is deepened to the second depth. Using a mixture of C.sub.4 H.sub.8, CH.sub.2 F.sub.2, CO, and Ar as the etching gas source, the silicon oxide dielectric layer exposed by the opening is etched, so that the openings are deepened to the third depth and the fourth depth.
REFERENCES:
patent: 5877092 (1999-03-01), Lee
patent: 5906948 (1999-05-01), Liu et al.
patent: 5942446 (1999-08-01), Chen et al.
Chen Tong-Yu
Yang Chan-Lon
Powell William
United Microelectronics Corp.
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