Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-02-13
1999-03-23
Utech, Benjamin
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438197, 438694, 438751, 438754, H01L 21302
Patent
active
058858881
ABSTRACT:
An etching material comprising at least phosphoric acid, acetic acid, and nitric acid, with chromic acid added therein. Also claimed is an etching process using the etching material above, provided that the process comprises selectively etching, by using the solution, an aluminum oxide layer formed on the surface of a material containing aluminum as the principal component thereof.
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patent: 4336111 (1982-06-01), Graunke
patent: 4900695 (1990-02-01), Takahashi et al.
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patent: 5639344 (1997-06-01), Konuma et al.
"Controlling The Interfacial Oxide Layer of Ti-Al Contacts with the CrO.sub.3 -H.sub.3 PO.sub.4 Etch"; Shankoff et al.; J. Elect. Soc. (1978), 125(3); pp. 467-471.
Konuma Toshimitsu
Sugawara Akira
Uehara Yukiko
Costellia Jeffrey L.
Ferguson Jr. Gerald J.
Goudreau George
Semiconductor Energy Laboratory Co,. Ltd.
Utech Benjamin
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