Etched-source static induction transistor

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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Details

29576E, 29580, 148175, 148187, 156657, 1566611, 156662, H01L 21306, B44C 122, C03C 1500, C23F 102

Patent

active

044379250

ABSTRACT:
A gate-source structure and fabrication method for a static induction transistor. The method and the device are embodied by the epitaxial layer of, for example, high resistivity p-type semiconductor material grown on an epitaxial layer of high resistivity n-type semiconductor material. A silicon dioxide layer with source and gate windows is formed on the p-type epitaxial layer. Source grooves are formed in the p-type epitaxial layer at source window locations and the grooves are diffused with n-type impurities to form a diffusion region which extends to connect with the n-type epitaxial layer. Source and gate electrodes are formed in the source and gate windows.

REFERENCES:
patent: 3847687 (1974-11-01), Davidsohn
patent: 3853496 (1974-12-01), Kim

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