Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-07-25
2003-03-25
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S724000, C438S740000
Reexamination Certificate
active
06537922
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to processes for selectively etching doped silicon dioxide that overlies silicon nitride or undoped silicon dioxide. Particularly, the process of the present invention includes an etchant mixture which includes the use of an ethane gas having the general formula C
2
H
x
F
y
, where x is an integer from two to five, inclusive, y is an integer from one to four, inclusive, and x plus y equals 6. The present invention also relates to etchant mixtures which include a component having the general formula C
2
H
x
F
y
, where x is an integer from two to five, inclusive, y is an integer from one to four, inclusive, and x plus y equals 6.
2. Background of Related Art
The fabrication of multi-layered structures upon semiconductor devices typically involves the patterning of doped silicon dioxide layers, including, without limitation, layers of phosphosilicate glass (PSG), borosilicate glass (BSG) and borophosphosilicate glass (BPSG). Such materials are typically employed as passivation layers on semiconductor devices. Etching techniques are typically employed to pattern many types of semiconductor device structures, including the formation of contacts through passivation layers. Etch stop layers are typically formed on underlying structures in order to terminate the etch process once the desired patterning of the passivation layer, or etch substrate, has occurred. Silicon nitride (Si
3
N
4
) is typically utilized as an etch stop during the patterning of silicon dioxide.
Typically, etching techniques include the depositing, masking and patterning of protective layers, such as photoresists, which act as templates, or protective masks, in order to define structures from a passivation layer by etching techniques. Wet etch or dry etch techniques may be employed to define semiconductor device structures from doped silicon dioxide passivation layers.
An exemplary wet etch process is disclosed in U.S. Pat. No. 5,300,463 (the “'463 patent”), issued to David A. Cathey et al. The wet etch process of the '463 patent, which employs hydrofluoric acid (HF) as an etchant, is selective for doped silicon dioxide over undoped silicon dioxide. Despite its specificity, that technique is somewhat undesirable from the standpoint that it suffers from many of the shortcomings that are typically associated with wet etch processes. Specifically, the technique of the '463 patent is an isotropic etch. Consequently, the structures defined thereby have different dimensions than those of the target area of the etch substrate that is exposed through the protective mask. Moreover, as those of skill in the art are aware, since wet etch techniques are typically isotropic, if the thickness of the film being etched is approximately equivalent to the minimum desired pattern dimension, the undercutting that is typically caused by isotropic etching becomes intolerable. Similarly, with the ever-decreasing size of structures that are carried on the active surfaces of semiconductor devices, etching must be very accurate and maintained within very precise tolerances in order to preserve the alignment of such minute structures and to optimize the electrical characteristics of such structures. Such precision cannot be obtained while defining structures on semiconductor devices with many conventional wet etch processes. Thus, the lack of precision and isotropic nature of typical wet etching processes are inconsistent with the overall goal of etch processes in forming structures on state-of-the-art semiconductor devices: reproducing the features defined by the protective mask with a high degree of fidelity.
In contrast, many dry etch techniques, including, without limitation, glow-discharge sputtering, ion milling, reactive ion etching (RIE), reactive ion beam etching (RIBE) and high-density plasma etching, are capable of etching in a substantially anisotropic fashion, meaning that the target area of an etch substrate is etched primarily in a substantially vertical direction relative to the exposed, or active, surface of the etch substrate. Thus, such dry etch techniques are capable of defining structures with substantially upright sidewalls from the etch substrate. Consequently, such dry etch techniques are capable of accurately reproducing the features of a protective mask. Thus, due to ever-decreasing dimensions of structures on semiconductor devices, dry etching is often desirable for defining structures upon semiconductor device active surfaces.
Many techniques that employ plasmas to dry etch silicon dioxide layers, however, lack the specificity of comparable wet etch techniques since fluorocarbons, such as CF
4
and CHF
3
, are typically employed in plasma dry etches of silicon dioxide layers. The radio-frequency (RF) plasmas that are typically utilized with many silicon dioxide dry etch processes generate activated species, such as fluoride ions and fluorine free radicals, from such fluorocarbon etchants. While these activated species attack the silicon dioxide layer in order to etch the same, the activated fluorine radicals and fluoride ions of many dry etch techniques may also attack other materials, such as silicon and silicon nitride. Consequently, in addition to etching the desired layer, many dry etch techniques that employ plasmas also undesirably etch the etch stop layers and other structures of the semiconductor device that are exposed or which become exposed during the etching process.
Etch stop materials employed in dry etch techniques are typically etched at a lower rate than the associated, usually underlying, etch substrate. Since the dry etchant etches the etch stop layer at a slower rate than the outer layer, the etch stop layer acts to protect structures therebeneath from the dry etch process, even as the etch stop itself is being consumed.
Since the gate structures of many semiconductor devices include a silicon nitride (Si
3
N
4
) cap, selectivity between silicon dioxide (SiO
2
) and silicon nitride is desirable in order to etch contacts through passivation layers. Many of the so-called silicon dioxide-selective plasma dry etch techniques, however, have a SiO
2
to Si
3
N
4
selectivity ratio, or etch rate of SiO
2
to etch rate of Si
3
N
4
, of less than about 3:1.
U.S. Pat. No. 5,286,344 (the “'344 patent”), issued to Guy Blalock et al. on Feb. 15, 1994, discloses a dry etch process which has much better selectivity for silicon dioxide over silicon nitride than many other conventional silicon dioxide dry etch techniques. Specifically, CH
2
F
2
, which is employed as an additive to a primary etchant such as CF
4
or CHF
3
, imparts the dry etchant mixture with improved selectivity for silicon dioxide over silicon nitride. The high energy ions that are required to etch both silicon dioxide and silicon nitride act by dissociating a chemical bond at the respective oxide or nitride surface. The dissociation energy that is required to etch silicon nitride, however, is less than that required to etch silicon dioxide. The use of CH
2
F
2
in the dry etchant causes polymer deposition on the silicon nitride surface that offsets the dissociation properties of silicon nitride relative to silicon dioxide relative to conventional dry etchants which lack additives such as CH
2
F
2
. Thus, the etchant of the '344 patent etches silicon dioxide over an etch stop of silicon nitride with a selectivity of greater than 30:1. As with other conventional silicon dioxide dry etch techniques, however, the only material that is disclosed as a useful etch stop in the '344 patent is silicon nitride. Thus, the utility of the dry etch process that is disclosed in the '344 patent is limited to defining semiconductor device structures which include a silicon nitride dielectric layer, such as, for example, contacts over silicon nitride-capped gates. Moreover, the relative flow rates of each of the dry etchant components disclosed in the '344 patent are limited to narrow ranges in order to achieve the desired level of se
Blalock Guy T.
Ko Kei-Yu
Li Li
Chen Kin-Chan
TraskBritt
Utech Benjamin L.
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