ESD protection structure for I/O pad subject to both...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S360000

Reexamination Certificate

active

07659585

ABSTRACT:
An ESD protection circuit is disclosed for an n-channel MOS transistor formed in an inner p-well of a triple-well process and connected to an I/O pad that may experience both positive and negative voltages according to the present invention. A first switch connects the p-well containing the n-channel MOS transistor to ground if the voltage at the I/O pad is positive and a second switch connects the p-well containing the n-channel MOS transistor to the I/O pad if the voltage at the I/O pad is negative. A third switch connects the gate of the n-channel MOS transistor to the p-well if it is turned off and a fourth switch connects the gate of the n-channel MOS transistor to Vccif it is turned on.

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