Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2004-12-29
2008-11-04
Menz, Douglas M (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S360000
Reexamination Certificate
active
07446378
ABSTRACT:
An ESD protection circuit is disclosed for an n-channel MOS transistor formed in an inner p-well of a triple-well process and connected to an I/O pad that may experience both positive and negative voltages according to the present invention. A first switch connects the p-well containing the n-channel MOS transistor to ground if the voltage at the I/O pad is positive and a second switch connects the p-well containing the n-channel MOS transistor to the I/O pad if the voltage at the I/O pad is negative. A third switch connects the gate of the n-channel MOS transistor to the p-well if it is turned off and a fourth switch connects the gate of the n-channel MOS transistor to VCCif it is turned on.
REFERENCES:
patent: 4503494 (1985-03-01), Hamilton et al.
patent: 4758745 (1988-07-01), Elgamal et al.
patent: 4870302 (1989-09-01), Freeman
patent: 5101122 (1992-03-01), Shinonara
patent: 5132571 (1992-07-01), McCollum et al.
patent: 5559449 (1996-09-01), Padoan et al.
patent: 5563526 (1996-10-01), Hastings et al.
patent: 5687325 (1997-11-01), Chang
patent: 5811987 (1998-09-01), Ashmore, Jr. et al.
patent: 5821776 (1998-10-01), McGowan
patent: 6150837 (2000-11-01), Beal et al.
patent: 6260087 (2001-07-01), Chang
patent: 6266222 (2001-07-01), Colombo et al.
patent: 6272646 (2001-08-01), Rangasayee et al.
patent: 6329694 (2001-12-01), Lee et al.
patent: 6600355 (2003-07-01), Nguyen
patent: 6614320 (2003-09-01), Sullam et al.
patent: 2002/0007467 (2002-01-01), Ma et al.
patent: 2002/0108006 (2002-08-01), Snyder
patent: 2004/0164354 (2004-08-01), Mergens et al.
Kwang-Hoon Oh et al., “Modeling of Temperature Dependent Contact Resistance for Analysis of ESD Reliability”, IEEE 03CH37400, 41st Annual International Reliability Physics Symposium, Dallas, Texas, pp. 249-255, Aug. 2003.
V. Vassilev et al., “Dynamic Substrate Resistance Snapback Triggering of ESD Protection Devices”, IEEE 03CH37400, 41st Annual International Reliability Physics Symposium, Dallas, Texas, pp. 256-260, Aug. 2003.
Author: Anonymous, 4-Pin μP Voltage Monitors with Manual Reset Input, Maxim Integrated Products, document 19-0411; Rev 3; Mar. 1999, pp. 1-8.
Author: Anonymous, “Fan Controller and Remote Temperature Sensor with SMBus Serial Interface” for MAX1669, Maxim Integrated Products, document 19-1575; Rev 0; Jan. 2000, pp. 1-20.
Author: Anonymous, “Precision Reset Controller and 4K I2C Memory With Both Reset ad Reset Outputs” for S24042/S24043, Summit Microelectronics, Inc., document 2011 2.0 May 2, 2000, pp. 1-14, May 2000.
Author: Anonymous, “SOT23, Low-Power μP Supervisory Circuits with Battery Backup and Chip-Enable Gating” for MAX6365-MAX6368, Maxim Integrated Products, document 19-1658; Rev 1; Jun. 2001, pp. 1-15.
Author: Anonymous, “Cypress MicroSystems PsoC Microcontrollers Now Available in Volume”, Cypress Semiconductor Corporation Press Release Sep. 5, 2001 [Internet: mhtml:file://D:\Act401\Cypress%20Semiconductor%20Corporation.mht].
Author: Anonymous, “nvSRAM—and EEPROM within a single chip” ZMD AG, pp. 1-4, Oct. 2001.
Author: Anonymous, “Intelligent Temperature Monitor and Dual PWM Fan Controller” for ADM1031, Analog Devices, pp. 1-32, 2003, no month.
Author: Anonymous, “LM63 ±1°C./±3°C. Accurate Remote Diode Digital Temperature Sensor with Integrated Fan Control”, National Semiconductor Corporation, document DS200570, pp. 1-28, May 2003.
Author: Anonymous, “PsoC™ Configurable Mixed-Signal Array with On-board Controller”, CY8C25122, CY8C26233, CY8C26443, CY8C26643, Device Data Sheet for Silicon Revision D, Cypress MicroSystems Document #: 38-12010 CY Rev. *B CMS Rev. 3.22, pp. 1-150, Aug. 18, 2003.
Author: Anonymous, “PSoC™ Mixed Signal Array”, Preliminary Data Sheet for CY8C29466, CY8C29566, CY8C29666, and CY8C29866, Cypress MicroSystems Document No. 38-12013 Rev. *D., pp. 1-41, Jun. 2004.
Notification of Transmittal of the International Search Report and The Written Opinion of the International Searching Authority, or the Declaration and International Search Report of Corresponding PCT Application PCT/US05/45522, dated Jul. 27, 2006, Form PCT/ISA/220 and Form PCT/ISA/210 (first and second sheets).
Actel Corporation
Lewis and Roca LLP
Menz Douglas M
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