ESD-protection of integrated circuit

Details ESD-protection of integrated circuit ESD-protection of integrated circuit

2000-12-19

2003-11-11

Jackson, Stephen W. (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C361S111000

Reexamination Certificate

active

06646841

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to electrostatic discharge protection in integrated circuits, in particular the invention relates to discharge protection in a chip assembly comprising a chip mounted on a support, the chip assembly comprising at least one terminal and discharge means for discharging a charge accumulated on or transferred to the terminal.
2. Description of the Prior Art
In modern chip-making the dimensions of the chip parts have been ever decreasing. Further these components exhibit high impedances. This has led to problems, because with decreased dimensions and increased impedances, the chips become more vulnerable to electrostatic discharges.
The high impedance of the chip allows potentially harmful electrostatic charges to accumulate on the external terminals or to be transferred thereto during manufacture, handling, storing, transport or mounting etc. of the chip.
These charges may be so large that they cause breakdown in the isolating layers of the active parts, e.g. transistors, resulting in a damaging discharge of the accumulated charge through the insulating layers of the active parts.
Even though the individual active part is damaged or even destroyed, this may not always be immediately apparent from the exterior of the chip, but may show only months later. In fact, sometimes the circuit will work, but with decreased performance.
It is well known in the art to overcome these problems by introducing protection means in the chip. A typical way is to introduce a zener diode between the terminal and ground and/or a diode between the terminal and the supply voltage.
However, the use of additional components such as zener and other diodes has the drawback that they load the terminal. In low frequency applications this is normally not a problem, but in RF circuits even the capacitance of a diode may load the circuit sufficiently to have significant influence on its performance. In particular this is the case in RF oscillator circuits, where the oscillation frequency is a function of capacitances and inductances associated with the circuit or incorporated therein.
In many semiconductor devices the active circuits are embodied as balanced circuits. There are several reasons for this. One reason is that it helps reducing the necessary supply voltage and thus reduces the power consumption of the chip. Another reason is that using balanced circuits obviates the need for a reference potential, and makes the individual circuits less likely to pick up noise transmitted from other circuits on the chip through the semiconducting material.
The invention provides a RF semiconductor chip with an electrostatic discharge protection means, without the above drawbacks.
SUMMARY OF THE INVENTION
A chip assembly according to the invention, comprises a discharge means connected to an RF common mode node, which is preferably on the support.
Preferably the discharge means is located within the chip, so that it can be provided during chip manufacture.
The discharge means is preferably a diode or a zener-diode or a combination thereof, depending on the polarity of the charge to be sinked, and whether the charge should be sinked to DC ground or to supply voltage.


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