ESD protection for submicron CMOS circuits

Details ESD protection for submicron CMOS circuits ESD protection for submicron CMOS circuits

1994-07-26

1995-08-08

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257363, 257499, 257532, 257536, 361 56, 361 91, H01L 2906, H02H 900

Patent

active

054401623

ABSTRACT:
An ESD protection circuit for the pads of an integrated circuit (IC) using silicide-clad diffusions is disclosed. The circuit uses a robust N+ diode with N-well block, an output NFET and a large transient clamp, each with a distributed, integrated N-well drain resistor to prevent the IC from avalanching and leakage during the Human Body Model and Charged Device Model tests for ESD.

REFERENCES:
Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 1993, Lake Buena Vista, Fla., Sep. 28-30, 1993, pp. 5B.5.1 through 5B.5.5.

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