ESD protection device

Details ESD protection device ESD protection device

2005-08-30

2005-08-30

Kielin, Erik (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C438S237000, C438S514000, C438S517000, C438S527000, C257S656000

Reexamination Certificate

active

06936895

ABSTRACT:
A new method to form an integrated circuit device is achieved. The method comprises forming a dielectric layer overlying a semiconductor substrate. An intrinsic semiconductor layer is formed overlying the dielectric layer. The intrinsic semiconductor layer is patterned. A p+ region is formed in the intrinsic semiconductor layer. An n+ region is formed in the intrinsic semiconductor layer. The p+ region and said n+ region are laterally separated by an intrinsic region to thereby form a PIN diode device. A source region and a drain region are formed in the semiconductor substrate to thereby complete a MOSFET device. The PIN diode device is a gate electrode for the MOSFET device.

REFERENCES:
patent: 4841349 (1989-06-01), Nakano
patent: 5610409 (1997-03-01), Leas et al.
patent: 5920091 (1999-07-01), Lin
patent: 5969561 (1999-10-01), McGillan
patent: 6259134 (2001-07-01), Amaratunga et al.
patent: 6304484 (2001-10-01), Shin et al.
patent: 2002/0066929 (2002-06-01), Voldman et al.
patent: 2002/0070388 (2002-06-01), Greenberg et al.
patent: 2002/0088978 (2002-07-01), Trainor et al.
Standard reference by S.M. Sze,Physics of Semiconductor Devices, Second Ed., John Wiley & Sons, Copyright 1981, pp. 570-577.

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