ESD protection circuit with floating diffusion regions

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C361S056000, C361S091500, C257SE29255

Reexamination Certificate

active

10956795

ABSTRACT:
This invention discloses an electrostatic discharge (ESD) protection circuit that comprises a substrate of a predetermined type, at least one MOS transistor being coupled to a pad of an integrated circuit for dissipating an ESD current from the pad during an ESD event, a substrate contact region, and at least one floating diffusion region formed in a substrate area between the MOS transistor and the substrate contact region for reducing a trigger-on voltage of the MOS transistor during the ESD event.

REFERENCES:
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patent: 6963111 (2005-11-01), Reddy et al.
patent: 6975015 (2005-12-01), Voldman et al.
patent: 7005708 (2006-02-01), Mergens et al.
patent: 2001/0007521 (2001-07-01), Chen
patent: 2003/0076645 (2003-04-01), Ker et al.
patent: 2003/0189230 (2003-10-01), Hung et al.
patent: 2003/0197225 (2003-10-01), Chen et al.
patent: 2003/0197246 (2003-10-01), Ker et al.
patent: 2005/0012155 (2005-01-01), Ker et al.
patent: 2006/0044718 (2006-03-01), Su et al.

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