Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2008-04-22
2008-04-22
Sherry, Michael (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
C361S091100, C361S091500, C361S111000
Reexamination Certificate
active
11509998
ABSTRACT:
An ESD protection circuit is implemented for a semiconductor device having a first circuit system operating with a first power supply voltage and a first complementary power supply voltage, and a second circuit system operating with a second power supply voltage and a second complementary power supply voltage. The ESD protection circuit includes a first diode having an anode coupled to the first power supply voltage and a cathode coupled to a first node connecting the first circuit system and the second circuit system for preventing a crosstalk of current between the first power supply voltage and the second complementary power supply voltage. A first MOS transistor module is coupled between the first node and the first complementary power supply for selectively creating a current path from the first node to the first complementary supply voltage for dissipating an ESD current during an ESD event.
REFERENCES:
patent: 4855863 (1989-08-01), Yoshitake
patent: 5515225 (1996-05-01), Gens et al.
patent: 6002568 (1999-12-01), Ker et al.
patent: 6075686 (2000-06-01), Ker
patent: 6144542 (2000-11-01), Ker et al.
patent: 6236549 (2001-05-01), Peleska
patent: 6459555 (2002-10-01), Welbers et al.
patent: 7072157 (2006-07-01), Kitagawa
patent: 7072158 (2006-07-01), Wang
patent: 7110228 (2006-09-01), Chang
patent: 7187527 (2007-03-01), Su et al.
Lee Jian-Hsing
Wu Chau-Neng
Kirkpatrick & Lockhart Preston Gates & Ellis LLP
Sherry Michael
Taiwan Semiconductor Manufacturing Co. Ltd.
Willoughby Terrence R.
LandOfFree
ESD protection circuit for a mixed-voltage semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with ESD protection circuit for a mixed-voltage semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and ESD protection circuit for a mixed-voltage semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3912640