ESD device protection structure and process with high tilt angle

Details ESD device protection structure and process with high tilt angle ESD device protection structure and process with high tilt angle

1998-08-14

1999-04-06

Monin, Jr., Donald L.

Pipes and tubular conduits

Repairing

438 24, 438 41, 438 31, 257263, 257360, 257361, 257404, G03C 177

Patent

active

058917926

ABSTRACT:
A structure and method for fabricating an ESD device for FET transistors by forming a silicon germanium region 40 under a channel region 44 of a field effect transistor (FET). The silicon germanium region 40 comprises the base of a parasitic bipolar 200 transistor that increases the turn on speed. The method comprises:

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patent: 5496751 (1996-03-01), Wei et al.
patent: 5623156 (1997-04-01), Watt
patent: 5714777 (1998-02-01), Ismail et al.
patent: 5750435 (1998-05-01), Pan

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