Error recovery in asynchronous combinational logic circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C714S789000, C365S181000, C326S035000

Reexamination Certificate

active

07451384

ABSTRACT:
A system and method for providing error recovery to an asynchronous logic circuit is presented. The asynchronous logic circuit with error recovery may use temporal redundancy to compare the results of an asynchronous computation and initiate error recovery if necessary. Outputs of the asynchronous logic circuit are compared using a plurality of asynchronous register voters. If an asynchronous register voter detects an inconsistent result, the asynchronous register voter clears itself. A majority of common data outputs from the plurality of asynchronous register voters is provided as an output that is representative of the output of the asynchronous logic circuit.

REFERENCES:
patent: 4074851 (1978-02-01), Eichelberger et al.
patent: 4621201 (1986-11-01), Amdahl et al.
patent: 4782467 (1988-11-01), Belt et al.
patent: 4805148 (1989-02-01), Diehl-Nagle et al.
patent: 4920515 (1990-04-01), Obata
patent: 5005212 (1991-04-01), Wood
patent: 5305463 (1994-04-01), Fant et al.
patent: 5317726 (1994-05-01), Horst
patent: 5406513 (1995-04-01), Canaris et al.
patent: 5430764 (1995-07-01), Chren, Jr.
patent: 5515282 (1996-05-01), Jackson
patent: 5550731 (1996-08-01), Jackson
patent: 5586071 (1996-12-01), Flora
patent: 5640105 (1997-06-01), Sobelman et al.
patent: 5652902 (1997-07-01), Fant
patent: 5656948 (1997-08-01), Sobelman et al.
patent: 5664211 (1997-09-01), Sobelman et al.
patent: 5664212 (1997-09-01), Fant et al.
patent: 5751726 (1998-05-01), Kim
patent: 5764081 (1998-06-01), Fant et al.
patent: 5793662 (1998-08-01), Duncan et al.
patent: 5796962 (1998-08-01), Fant et al.
patent: 5822228 (1998-10-01), Irrinki et al.
patent: 5828228 (1998-10-01), Fant et al.
patent: 5896541 (1999-04-01), Fant et al.
patent: 5907693 (1999-05-01), Fant et al.
patent: 5912901 (1999-06-01), Adams et al.
patent: 5917834 (1999-06-01), Arkin
patent: 5930522 (1999-07-01), Fant
patent: 5977663 (1999-11-01), Fant et al.
patent: 5986466 (1999-11-01), Sobelman et al.
patent: 6020754 (2000-02-01), Sobelman et al.
patent: 6031390 (2000-02-01), Fant et al.
patent: 6043674 (2000-03-01), Sobelman
patent: 6052770 (2000-04-01), Fant
patent: 6128678 (2000-10-01), Masteller
patent: 6262593 (2001-07-01), Sobelman et al.
patent: 6278287 (2001-08-01), Baze
patent: 6292128 (2001-09-01), Tsui et al.
patent: 6308229 (2001-10-01), Masteller
patent: 6313660 (2001-11-01), Sobelman et al.
patent: 6326809 (2001-12-01), Gambles et al.
patent: 6327607 (2001-12-01), Fant
patent: 6333640 (2001-12-01), Fant et al.
patent: 6526542 (2003-02-01), Kondratyev
patent: 6667520 (2003-12-01), Fulkerson
patent: 2002/0074609 (2002-06-01), Maruyama
patent: 2003/0091038 (2003-05-01), Hagedorn
Slivinsky et al., Monitoring and Voting in Asynchronous Sampling, Jan. 1985, IEEE, vol. AES-21, No. 7, pp. 92-99.
Maher, Michael, “Radiation Design Considerations Using CMOS Logic,” National Semiconductor Application Note 926, Jan. 1994.
“Throw Away the Clock,” Theseus Logic—Benefits of NCL—EMI, http://www.theseus.com/—AboutNCL.htm, printed Nov. 19, 2002.
Sobelman, Gerald E. and Karl Fant, “CMOS Circuit Design of Threshold Gates with Hysteresis,”, date unknown.
Fant, Karl M. and Scott A. Brandt, “NULL Convention Logic,” Theseus Logic: Setting the Standard for Clockless Systems, 1997.
International Search Report for PCT/US2005/024838 dated Nov. 15, 2005.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Error recovery in asynchronous combinational logic circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Error recovery in asynchronous combinational logic circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Error recovery in asynchronous combinational logic circuits will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4040295

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.