Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1998-05-28
2000-05-30
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714764, G06F 1100
Patent
active
060702559
ABSTRACT:
A method and device are provided for a SIMM or DIMM which has ECC on board and which is configured to operate during and only during the power-on-self-test operation to determine if an error has been detected in memory on the read cycle in the memory test during POST and flag that error to the CPU through the memory controller even though the error has been corrected on the SIMM or DIMM card.
REFERENCES:
patent: 5068851 (1991-11-01), Bruckert et al.
patent: 5263032 (1993-11-01), Porter et al.
patent: 5291494 (1994-03-01), Bruckert et al.
patent: 5450422 (1995-09-01), Dell
patent: 5588112 (1996-12-01), Dearth et al.
Dell Timothy J.
Dimitri Kamal E.
Beausoliel, Jr. Robert W.
Hogg William N.
International Business Machines - Corporation
Revak Christopher A.
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