Error monitoring system and method

Details Error monitoring system and method Error monitoring system and method

2006-04-25

2006-04-25

Chase, Shelly (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error/fault detection technique

Reexamination Certificate

active

07036070

ABSTRACT:
An error monitoring system for a transceivers includes a multiplexer and a parity calculating circuit. A comparator has a first input that is coupled to the multiplexer and a second input that is coupled to the parity calculating circuit.

REFERENCES:
patent: 6493847 (2002-12-01), Sorgi et al.
patent: 6738395 (2004-05-01), Diaconescu et al.
patent: 6775799 (2004-08-01), Giorgetta et al.
Trost, Robert, Bit error rate monitoring for a SONET/SDH framer, Apr. 2001, www.google.com, p. 1 to 23.

Affiliated with

Also associated with

Rating

Error monitoring system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Error monitoring system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Error monitoring system and method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3600395