Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1998-03-26
2000-08-15
Wright, Norman M.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 45, 714723, H02H 305, G11C 2900
Patent
active
061051500
ABSTRACT:
A CPU in a computer includes a control information management table for storing information about whether an error has occurred in a control unit in the computer or in a control unit in a communications card. When an error occurs in any of the control units, the occurrence of the error is recorded in the control information management table, and an error message is transmitted by the monitor to an operator. When a dump collection command is issued by the operator in response to the error message, the monitor specifies the CPU in the computer or the communications card which operates the control unit where the error has occurred, by referring to the control information management table, and collects only the dump information corresponding to the control unit.
REFERENCES:
patent: 5495573 (1996-02-01), Datwyler et al.
patent: 5515384 (1996-05-01), Horton, III
patent: 5617531 (1997-04-01), Crouch et al.
patent: 5696769 (1997-12-01), Choi et al.
patent: 5720031 (1998-02-01), Lindsay
Noguchi Mayumi
Shimada Fumio
Shinboku Tetsuya
Fujitsu Limited
Wright Norman M.
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