Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-05-22
2007-05-22
Maskulinski, Michael (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C702S099000, C702S104000
Reexamination Certificate
active
10709052
ABSTRACT:
A monitor circuit has a first detection module for detecting an input signal and for generating a first examining signal according to the input signal, a second detection module electrically connected to the first detection module for generating an output signal according to the first examining signal, and a control unit electrically connected to the first and the second detection modules selectively for controlling the second detection module to generate the output signal according to the first examining signal, for controlling the first detection module to monitor the output and to generate a second examining signal, or for comparing the first examining signal with the second examining signal so as to determine if the monitor circuit is functioning normally.
REFERENCES:
patent: 6161958 (2000-12-01), Rattman et al.
patent: 6598195 (2003-07-01), Adibhatla et al.
patent: 6774653 (2004-08-01), Gold et al.
patent: 6804600 (2004-10-01), Uluyol et al.
patent: 2003/0012254 (2003-01-01), Park et al.
patent: 2006/0162419 (2006-07-01), Rosskopf
Chan Sen-Ta
Chen Yi-Hsun
Wu Yi-Chang
Hsu Winston
Maskulinski Michael
Wistron Corporation
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