Error-detection flip-flop

Details Error-detection flip-flop Error-detection flip-flop

2005-12-30

2008-08-05

Chung, Phung M (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error detection for synchronization control

C714S724000, C714S735000

Reexamination Certificate

active

07409631

ABSTRACT:
An error-detection flip-flop is disclosed for identifying timing errors in digital circuits. The error-detection flip-flop is a master-slave flip-flop including logic to determine whether an input signal is received during a predetermined clock period, signifying a timing error. The error-detection flip-flop produces a variable-length error pulse, which may be combined with other error pulses and converted to a stable signal for sampling by error-correction circuitry. The error-detection flip-flop does not increase the clocking power of the digital circuit and consumes little additional circuit area.

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Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation, 2003, Dam Ernst, et al., IEEE pp. 1-13.

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