Error detection and correction

Details Error detection and correction Error detection and correction

1997-06-30

1999-12-14

Beausoliel, Jr., Robert W.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

G06F 1100

Patent

active

060031441

ABSTRACT:
A computer system having a CPU, a disk array system accessible by the CPU, and a disk array controller that includes error detection and connection logic. The disk array controller includes a processor and a memory system connected to signal lines carrying data bits, address bits, and check bits. An error detection and correction device is connected to detect and correct N-bit errors in the data bits using the check bits, N being greater than two. An error in the address bits is detected using the same check bits. The data bits are organized as multiple bytes, and the error detection and correction device is connected to detect and correct up to eight-bit errors in each byte and to detect a single-bit error or a two-adjacent-bit error in the address bits.

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