Error decoding method and apparatus for Reed-Solomon codes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

714756, H03M 1300

Patent

active

059448482

ABSTRACT:
A method and an apparatus for performing error decoding on digital data using a Reed-Solomon code. The method decodes the value and location of errors and erasures on digital data defined as RS.sub.m (n,n-4) of the Reed-Solomon code by a series of arithmetic operations using multiplication-addition, inversion, shift-logarithm operations, and location determinations, but without power operation. Thus, the decoder requires less hardware. By these calculations the values and locations of errors and erasures on digital data are determined correctly and rapidly, avoiding Chien's search.

REFERENCES:
patent: 4646301 (1987-02-01), Okamoto et al.
patent: 4677622 (1987-06-01), Okamoto et al.
patent: 4852099 (1989-07-01), Ozaki

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Error decoding method and apparatus for Reed-Solomon codes does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Error decoding method and apparatus for Reed-Solomon codes, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Error decoding method and apparatus for Reed-Solomon codes will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2425463

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.