Error correction in a cache memory

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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C712S231000

Reexamination Certificate

active

10885356

ABSTRACT:
Various systems and methods for error correction of instructions in an instruction cache coupled to a processor are provided. In one embodiment, a plurality of instructions stored in the instruction cache are fetched for execution by the processor, each of the instructions being fetched during a respective one of a plurality of instruction cycles of the processor. Error detection is performed for each of the instructions concurrently with the fetching of a respective one of the instructions.

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